The present invention relates to low-powered integrated circuit memories, and particularly to integrated circuits having secure memory therein.
Battery-Backed Integrated Circuits
Compact batteries are increasingly used inside integrated circuit packages or in very small modules, to provide nonvolatile data retention. In such packages and modules, the availability of battery backup can be used to ensure that power outages or power-line noise cannot cause loss of data (including configuration data). For example, modern semiconductor technology has provided solid-state memories with such low standby power requirements that a single coin-sized battery can power the memory for ten years of lifetime or more. Such memories are already commercially available.
The very rapid progress of integrated circuit complexity generally, and the general use of CMOS processing, have permitted a huge increase in the functionality which can be included in a very compact portable system. However, power supply capabilities have not advanced as rapidly. Battery technology has provided a relatively slow increase in the amount of energy which can be stored per unit weight (or per unit volume). Thus, in order to provide complex functionality in a small portable module, a very high degree of power efficiency has become an enabling technology.
Low-Power Memories
Conventional CMOS static memories have developed to the point where their standby power consumption is extremely small. The low power consumption of CMOS is extremely advantageous in a wide variety of environments, and is one of the reasons why CMOS logic has become very widely used for a wide variety of digital circuits. Low power consumption is not only advantageous where the total drain on system power supply must be conserved (as, for example, in applications where the power is being supplied from a battery), but also implies that the power dissipation on-chip will be less. This can be important in a wide variety of applications where a very high density is required.
In a conventional CMOS SRAM, six transistors are used in each cell. Four of these transistors form a latch (i.e. a pair of cross-coupled inverters), which has two data nodes with opposite logic states. Each node is connected to ground through an NMOS driver transistor. The driver transistor which connects each node to ground has its gate connected to the opposite data node so that, when one data node goes high, it will pull the opposite data node low by turning on its driver transistor. Similarly, each node is connected, through a PMOS pull-up transistor, to the high supply voltage V.sub.DD (which is typically 5 volts). Again, the data nodes are connected to control the pull-up transistors of the opposite data node, so that, when one of the data nodes goes low, it will turn on the pull-up transistor of the opposite node, so that the opposite node is held high. In addition, two pass transistors (normally NMOS transistors) selectively connect the two data nodes to a pair of bit lines. (The gates of the pass transistors are connected to a word line, so that the cell nodes will be connected to the bit line pair only if the word line goes high.) Such a 6-transistor cell will hold its logic state indefinitely (as long as the supply voltages are maintained and no transient upset occurs). Moreover, while such a cell is simply holding data, it has almost zero power consumption, since each of the nodes will be disconnected from one of the two power supply voltages. Thus no current flows, except for the very small currents caused by junction leakage. (Currents do flow when read or write operations are occurring, and therefore the power consumption of an active cell is much higher.)
However, even higher power efficiencies would be useful. Many system designs have begun to make use of the low standby power consumption of CMOS memory, to provide nonvolatile memory by attaching a very small battery. For example, many personal computers contain a battery-backed clock/calendar, which continues to keep time and date information when the computer is switched off. Many portable applications have also begun to use significant amounts of memory. In such applications, battery lifetime is one of the key performance parameters, from the end-user's point of view. If an integrated circuit which is sold for use in such systems turns out to consume more power than specified, so that the system batteries are exhausted early, this could be very unwelcome to the end-user. A further important class of applications is in packaging an integrated circuit, which includes some memory functions, together with a very small battery. The power supplied by the battery is used to preserve the data in memory while the system power supply is turned off. Thus, this arrangement permits the full advantages of nonvolatile memory to be achieved, without incurring the penalties of high-voltage circuitry and slow write time (as in EPROM or EEPROM floating-gate technology).
Address Remapping
In the type of computer systems known as "virtual memory" systems, the range of addresses which can be specified is much larger than the amount of physical memory which is actually present. The software can access data by specifying a logical address, without ever having to find out what physical address the logical address corresponds to. (Of course, the translation of logical address to physical address must be done consistently from one access to another.) Thus, at each memory access, the logical address specified by software must be translated into a physical memory address, which can be used for actually selecting RAM chips (or other memory devices). A wide variety of circuits have long been used for translating logical addresses into physical memory addresses.